Introduction of SAK-XC164CS-16F40F BB and C166S V2
C166S V2 is a member of the most recent generation of the popular C166 microcontroller cores. C166S V2 combines high performance with enhanced modular architecture. It was developed to provide easy migration from standard existing C16x to the new C166S V2 core with its impressive DSP performance and advanced interrupt handling. The system architecture inherits successful hardware and software concepts that have been established in the C16x 16-bit microcontroller families. C166 code compatibility enable re-use of existing code. This dramatically reduces the time-tomarket for new product development. The following features position C166S V2 strategically for contemporary and emerging markets for performance-hungry real-time applications:
– High CPU performance. Single clock cycle execution doubles the performance at the same CPU frequency (relative to the performance of the C166).
– Built-in advanced MAC unit dramatically increases DSP performance.
– High Internal Program Memory bandwidth and the instruction fetch pipeline significantly improve program flow regularity and optimize fetches into the execution pipeline.
– Sophisticated Data Memory structure and multiple high-speed data buses provide transparent data access (0 cycles) and broad bandwidth for efficient DSP processing.
– Advanced exceptions handling block with multi-stage arbitration capability yields stellar interrupt performance with extremely small latency.
– Upgraded Peripheral Event Controller supports efficient and flexible DMA features to support a broad range of fast peripherals.
– Highly modular architecture and flexible bus structure provide effective methods of integrating application-specific peripherals to produce customer-oriented derivatives. This User’s Manual describes the new standard C166S V2 core independently from its use for the dedicated product. Differencies to existing standard products are therefore described in the User’s Manual (or Target Specification) of the product.
